IEEE Standards related to DFT

This Standard for Embedded Core Test has been created to address the test complexity of System on Chips (SoCs) by providing a standardized test bus interface and a set of rules applied to isolate a particular core from the logic surrounding that core. The purpose of this isolation boundary (called a wrapper) is to allow the test of a core without any influence from circuitry outside the core, while keeping the amount of signals that must be brought out to the SoC level to a minimum. Similar to the Boundary Scan Register in a JTAG/Boundary Scan compliant device, the wrapper in a IEEE 1500 compliant devices comprises of wrapper cells for each functional I/O port. The wrapper cells are stringed together to form one or more wrapper scan chain(s). The wrapper cells are used to observe and stimulate the core logic they are linked to.

DFT Guide

IEEE 1500 Summary

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