IEEE Standards related to DFT
IEEE 1149.6 Summary
Friday, 08 August 2008 02:16
One shortcoming of IEEE 1149.1 lies in its quasi static test patterns. When looked at sequentially, test patterns are applied at a fairly low rate, due to the fact that every pattern has to be loaded and unloaded serially through the Boundary Scan chain. The serial access method of IEEE 1149.1 practically eliminates any possibility to apply test pattern on dynamic I/O pins at functional speed (each test pattern requires hundreds or thousands of TCK clocks to be shifted through the scan chain).
With the arrival of AC coupled networks, Boundary Scan hit a road block. Serial capacitors in a signal path hinder the transmission of static test pattern as applied with IEEE 1149.1 compliant test resources. To solve this problem and to allow Boundary Scan tests to include such AC coupled networks, another IEEE working group defined the IEEE Std. 1149.6, approved in 2003. This Standard for Boundary Scan Testing of Advanced Digital networks is based on the transmission of signal transitions, rather than static logic High and logic Low levels.
