DFT Guide

To accelerate FLASH programming procedures or other memory operations by Boundary Scan, the pulse generation for respective control signals could be generated internally in conjunction with BST (Boundary Scan Test) logic and/or outputs could be tri-state to apply control lines externally. Consider implementing special registers (including only the cells needed for a specific test application) in ASIC’s, so that scan cells not needed don’t lengthen the scan chain without providing any value for the test.